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  1. #include "spi.h"
  2. //*************************
  3. // SPI1 Initation
  4. //
  5. //*************************
  6. void SPI1_Init() //SPI1ʼ
  7. {
  8. GPIO_InitTypeDef GPIO_InitStructure;
  9. SPI_InitTypeDef SPI_InitStructure;
  10. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_SPI1|RCC_APB2Periph_AFIO, ENABLE);
  11. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7; //PA5 PA6 PA7
  12. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //
  13. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; //IOٶΪ50MHz
  14. GPIO_Init(GPIOA, &GPIO_InitStructure);
  15. GPIO_SetBits(GPIOA,GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7); //
  16. SPI_InitStructure.SPI_Direction=SPI_Direction_2Lines_FullDuplex; // SPI Ϊ˫˫ȫ˫
  17. SPI_InitStructure.SPI_Mode=SPI_Mode_Master; //SPIΪģʽ
  18. SPI_InitStructure.SPI_DataSize=SPI_DataSize_8b; //SPIݴСΪ8λ
  19. SPI_InitStructure.SPI_CPOL=SPI_CPOL_Low; //SPIĬʱΪߵƽ
  20. SPI_InitStructure.SPI_CPHA=SPI_CPHA_1Edge; //SPIݲڵڶʱ
  21. SPI_InitStructure.SPI_NSS=SPI_NSS_Soft; //SPI NSSܽ
  22. SPI_InitStructure.SPI_BaudRatePrescaler=SPI_BaudRatePrescaler_16; //SPI ԤƵֵΪ 256
  23. SPI_InitStructure.SPI_FirstBit=SPI_FirstBit_MSB; //SPI ݴӸλ
  24. SPI_InitStructure.SPI_CRCPolynomial=7; //SPI CRCֵĶʽ
  25. SPI_Init(SPI1,&SPI_InitStructure);
  26. SPI_Cmd(SPI1,ENABLE); //ʹSPI1
  27. }
  28. //*************************
  29. // SPI2
  30. //
  31. //*************************
  32. void SPI2_Init() //SPI2ʼ
  33. {
  34. GPIO_InitTypeDef GPIO_InitStructure;
  35. SPI_InitTypeDef SPI_InitStructure;
  36. RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);//SPI2ʱ
  37. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB|RCC_APB2Periph_AFIO, ENABLE);
  38. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15; //PB13 PB14 PB15
  39. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //
  40. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; //IOٶΪ50MHz
  41. GPIO_Init(GPIOB, &GPIO_InitStructure);
  42. GPIO_SetBits(GPIOB,GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15); //
  43. SPI_InitStructure.SPI_Direction=SPI_Direction_2Lines_FullDuplex; // SPI Ϊ˫˫ȫ˫
  44. SPI_InitStructure.SPI_Mode=SPI_Mode_Master; //SPIΪģʽ
  45. SPI_InitStructure.SPI_DataSize=SPI_DataSize_8b; //SPIݴСΪ8λ
  46. SPI_InitStructure.SPI_CPOL=SPI_CPOL_Low; //SPIĬʱΪߵƽ
  47. SPI_InitStructure.SPI_CPHA=SPI_CPHA_1Edge; //SPIݲڵڶʱ
  48. SPI_InitStructure.SPI_NSS=SPI_NSS_Soft; //SPI NSSܽ
  49. SPI_InitStructure.SPI_BaudRatePrescaler=SPI_BaudRatePrescaler_16; //SPI ԤƵֵΪ 256
  50. SPI_InitStructure.SPI_FirstBit=SPI_FirstBit_MSB; //SPI ݴӸλ
  51. SPI_InitStructure.SPI_CRCPolynomial=7; //SPI CRCֵĶʽ
  52. SPI_Init(SPI2,&SPI_InitStructure);
  53. SPI_Cmd(SPI2,ENABLE); //ʹSPI2
  54. }
  55. //----------------------------------------------------------------
  56. // SPIдһֽ
  57. //
  58. u8 SPI_ReadWriteByte(SPIType spiNum,u8 dat) //SPI2дһֽ
  59. {
  60. u8 t;
  61. u8 temp8;
  62. if(spiNum == SPI_PORT1){
  63. while(SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_TXE)==RESET) //ȴͻ
  64. {
  65. t++;
  66. if(t>=200)return 0; //ʱش־
  67. }
  68. SPI_I2S_SendData(SPI1,dat); //
  69. t=0;
  70. while(SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_RXNE)==RESET) //ȴ
  71. {
  72. t++;
  73. if(t>=200)return 0; //ʱش־
  74. }
  75. temp8 = SPI_I2S_ReceiveData(SPI1); //SPI1յ
  76. }else{
  77. while(SPI_I2S_GetFlagStatus(SPI2,SPI_I2S_FLAG_TXE)==RESET) //ȴͻ
  78. {
  79. t++;
  80. if(t>=200)return 0; //ʱش־
  81. }
  82. SPI_I2S_SendData(SPI2,dat); //
  83. t=0;
  84. while(SPI_I2S_GetFlagStatus(SPI2,SPI_I2S_FLAG_RXNE)==RESET) //ȴ
  85. {
  86. t++;
  87. if(t>=200)return 0; //ʱش־
  88. }
  89. temp8 = SPI_I2S_ReceiveData(SPI2); //SPI2յ
  90. }
  91. return temp8;
  92. }
  93. void SPI_SetSpeed(SPIType spiNum,u8 SPI_BaudRatePrescaler) //SPI2ٶ
  94. {
  95. assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_BaudRatePrescaler));
  96. if(spiNum == SPI_PORT1){
  97. SPI1->CR1&=0XFFC7; //޸BR[2:0]ֵ
  98. SPI1->CR1|=SPI_BaudRatePrescaler; //SPI1ٶ
  99. SPI_Cmd(SPI2,ENABLE);
  100. }else{
  101. SPI2->CR1&=0XFFC7; //޸BR[2:0]ֵ
  102. SPI2->CR1|=SPI_BaudRatePrescaler; //SPI2ٶ
  103. SPI_Cmd(SPI2,ENABLE);
  104. }
  105. }