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card_2.4G_compare_tools/RVMDK/Obj/Printf_PC.htm

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  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">

  2. <html><head>

  3. <title>Static Call Graph - [.\Obj\Printf_PC.axf]</title></head>

  4. <body><HR>

  5. <H1>Static Call Graph for image .\Obj\Printf_PC.axf</H1><HR>

  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060061: Last Updated: Wed Nov 13 17:08:26 2019

  7. <BR><P>

  8. <H3>Maximum Stack Usage =        128 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>

  9. Call chain for Maximum Stack Depth:</H3>

  10. main &rArr; DataProc_USART1 &rArr; DataProc_A0_WriteNum_SPI2 &rArr; NRF24L01_RX_Mode_NOACK &rArr; NRF24L01_RX_YunNan_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  11. <P>

  12. <H3>

  13. Mutually Recursive functions

  14. </H3> <LI><a href="#[1c]">ADC1_2_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC1_2_IRQHandler</a><BR>

  15. </UL>

  16. <P>

  17. <H3>

  18. Function Pointers

  19. </H3><UL>

  20.  <LI><a href="#[1c]">ADC1_2_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  21.  <LI><a href="#[39]">ADC3_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  22.  <LI><a href="#[4]">BusFault_Handler</a> from stm32f10x_it.o(i.BusFault_Handler) referenced from startup_stm32f10x_hd.o(RESET)

  23.  <LI><a href="#[1f]">CAN1_RX1_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  24.  <LI><a href="#[20]">CAN1_SCE_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  25.  <LI><a href="#[15]">DMA1_Channel1_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  26.  <LI><a href="#[16]">DMA1_Channel2_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  27.  <LI><a href="#[17]">DMA1_Channel3_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  28.  <LI><a href="#[18]">DMA1_Channel4_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  29.  <LI><a href="#[19]">DMA1_Channel5_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  30.  <LI><a href="#[1a]">DMA1_Channel6_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  31.  <LI><a href="#[1b]">DMA1_Channel7_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  32.  <LI><a href="#[42]">DMA2_Channel1_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  33.  <LI><a href="#[43]">DMA2_Channel2_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  34.  <LI><a href="#[44]">DMA2_Channel3_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  35.  <LI><a href="#[45]">DMA2_Channel4_5_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  36.  <LI><a href="#[7]">DebugMon_Handler</a> from stm32f10x_it.o(i.DebugMon_Handler) referenced from startup_stm32f10x_hd.o(RESET)

  37.  <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  38.  <LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  39.  <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  40.  <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  41.  <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  42.  <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  43.  <LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  44.  <LI><a href="#[e]">FLASH_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  45.  <LI><a href="#[3a]">FSMC_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  46.  <LI><a href="#[2]">HardFault_Handler</a> from stm32f10x_it.o(i.HardFault_Handler) referenced from startup_stm32f10x_hd.o(RESET)

  47.  <LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  48.  <LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  49.  <LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  50.  <LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  51.  <LI><a href="#[3]">MemManage_Handler</a> from stm32f10x_it.o(i.MemManage_Handler) referenced from startup_stm32f10x_hd.o(RESET)

  52.  <LI><a href="#[1]">NMI_Handler</a> from stm32f10x_it.o(i.NMI_Handler) referenced from startup_stm32f10x_hd.o(RESET)

  53.  <LI><a href="#[b]">PVD_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  54.  <LI><a href="#[8]">PendSV_Handler</a> from stm32f10x_it.o(i.PendSV_Handler) referenced from startup_stm32f10x_hd.o(RESET)

  55.  <LI><a href="#[f]">RCC_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  56.  <LI><a href="#[33]">RTCAlarm_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  57.  <LI><a href="#[d]">RTC_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  58.  <LI><a href="#[0]">Reset_Handler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  59.  <LI><a href="#[3b]">SDIO_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  60.  <LI><a href="#[2d]">SPI1_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  61.  <LI><a href="#[2e]">SPI2_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  62.  <LI><a href="#[3d]">SPI3_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  63.  <LI><a href="#[6]">SVC_Handler</a> from stm32f10x_it.o(i.SVC_Handler) referenced from startup_stm32f10x_hd.o(RESET)

  64.  <LI><a href="#[9]">SysTick_Handler</a> from stm32f10x_it.o(i.SysTick_Handler) referenced from startup_stm32f10x_hd.o(RESET)

  65.  <LI><a href="#[47]">SystemInit</a> from system_stm32f10x.o(i.SystemInit) referenced from startup_stm32f10x_hd.o(.text)

  66.  <LI><a href="#[c]">TAMPER_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  67.  <LI><a href="#[22]">TIM1_BRK_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  68.  <LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  69.  <LI><a href="#[24]">TIM1_TRG_COM_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  70.  <LI><a href="#[23]">TIM1_UP_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  71.  <LI><a href="#[26]">TIM2_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  72.  <LI><a href="#[27]">TIM3_IRQHandler</a> from dataproc.o(i.TIM3_IRQHandler) referenced from startup_stm32f10x_hd.o(RESET)

  73.  <LI><a href="#[28]">TIM4_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  74.  <LI><a href="#[3c]">TIM5_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  75.  <LI><a href="#[40]">TIM6_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  76.  <LI><a href="#[41]">TIM7_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  77.  <LI><a href="#[35]">TIM8_BRK_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  78.  <LI><a href="#[38]">TIM8_CC_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  79.  <LI><a href="#[37]">TIM8_TRG_COM_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  80.  <LI><a href="#[36]">TIM8_UP_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  81.  <LI><a href="#[3e]">UART4_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  82.  <LI><a href="#[3f]">UART5_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  83.  <LI><a href="#[2f]">USART1_IRQHandler</a> from printf.o(i.USART1_IRQHandler) referenced from startup_stm32f10x_hd.o(RESET)

  84.  <LI><a href="#[30]">USART2_IRQHandler</a> from usart2.o(i.USART2_IRQHandler) referenced from startup_stm32f10x_hd.o(RESET)

  85.  <LI><a href="#[31]">USART3_IRQHandler</a> from printf.o(i.USART3_IRQHandler) referenced from startup_stm32f10x_hd.o(RESET)

  86.  <LI><a href="#[34]">USBWakeUp_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  87.  <LI><a href="#[1d]">USB_HP_CAN1_TX_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  88.  <LI><a href="#[1e]">USB_LP_CAN1_RX0_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  89.  <LI><a href="#[5]">UsageFault_Handler</a> from stm32f10x_it.o(i.UsageFault_Handler) referenced from startup_stm32f10x_hd.o(RESET)

  90.  <LI><a href="#[a]">WWDG_IRQHandler</a> from startup_stm32f10x_hd.o(.text) referenced from startup_stm32f10x_hd.o(RESET)

  91.  <LI><a href="#[48]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f10x_hd.o(.text)

  92.  <LI><a href="#[49]">fputc</a> from printf.o(i.fputc) referenced from printfb.o(i.__0printf$bare)

  93.  <LI><a href="#[46]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)

  94. </UL>

  95. <P>

  96. <H3>

  97. Global Symbols

  98. </H3>

  99. <P><STRONG><a name="[48]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))

  100. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(.text)

  101. </UL>

  102. <P><STRONG><a name="[bf]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

  103. 

  104. <P><STRONG><a name="[4a]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))

  105. <BR><BR>[Calls]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload

  106. </UL>

  107. 

  108. <P><STRONG><a name="[4f]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))

  109. <BR><BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload

  110. </UL>

  111. 

  112. <P><STRONG><a name="[c0]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

  113. 

  114. <P><STRONG><a name="[c1]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

  115. 

  116. <P><STRONG><a name="[c2]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

  117. 

  118. <P><STRONG><a name="[c3]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))

  119. 

  120. <P><STRONG><a name="[c4]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))

  121. 

  122. <P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  123. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  124. </UL>

  125. <P><STRONG><a name="[1c]"></a>ADC1_2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  126. <BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler

  127. </UL>

  128. <BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler

  129. </UL>

  130. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  131. </UL>

  132. <P><STRONG><a name="[39]"></a>ADC3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  133. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  134. </UL>

  135. <P><STRONG><a name="[1f]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  136. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  137. </UL>

  138. <P><STRONG><a name="[20]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  139. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  140. </UL>

  141. <P><STRONG><a name="[15]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  142. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  143. </UL>

  144. <P><STRONG><a name="[16]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  145. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  146. </UL>

  147. <P><STRONG><a name="[17]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  148. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  149. </UL>

  150. <P><STRONG><a name="[18]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  151. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  152. </UL>

  153. <P><STRONG><a name="[19]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  154. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  155. </UL>

  156. <P><STRONG><a name="[1a]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  157. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  158. </UL>

  159. <P><STRONG><a name="[1b]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  160. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  161. </UL>

  162. <P><STRONG><a name="[42]"></a>DMA2_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  163. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  164. </UL>

  165. <P><STRONG><a name="[43]"></a>DMA2_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  166. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  167. </UL>

  168. <P><STRONG><a name="[44]"></a>DMA2_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  169. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  170. </UL>

  171. <P><STRONG><a name="[45]"></a>DMA2_Channel4_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  172. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  173. </UL>

  174. <P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  175. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  176. </UL>

  177. <P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  178. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  179. </UL>

  180. <P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  181. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  182. </UL>

  183. <P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  184. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  185. </UL>

  186. <P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  187. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  188. </UL>

  189. <P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  190. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  191. </UL>

  192. <P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  193. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  194. </UL>

  195. <P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  196. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  197. </UL>

  198. <P><STRONG><a name="[3a]"></a>FSMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  199. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  200. </UL>

  201. <P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  202. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  203. </UL>

  204. <P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  205. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  206. </UL>

  207. <P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  208. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  209. </UL>

  210. <P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  211. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  212. </UL>

  213. <P><STRONG><a name="[b]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  214. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  215. </UL>

  216. <P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  217. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  218. </UL>

  219. <P><STRONG><a name="[33]"></a>RTCAlarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  220. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  221. </UL>

  222. <P><STRONG><a name="[d]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  223. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  224. </UL>

  225. <P><STRONG><a name="[3b]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  226. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  227. </UL>

  228. <P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  229. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  230. </UL>

  231. <P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  232. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  233. </UL>

  234. <P><STRONG><a name="[3d]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  235. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  236. </UL>

  237. <P><STRONG><a name="[c]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  238. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  239. </UL>

  240. <P><STRONG><a name="[22]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  241. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  242. </UL>

  243. <P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  244. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  245. </UL>

  246. <P><STRONG><a name="[24]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  247. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  248. </UL>

  249. <P><STRONG><a name="[23]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  250. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  251. </UL>

  252. <P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  253. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  254. </UL>

  255. <P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  256. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  257. </UL>

  258. <P><STRONG><a name="[3c]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  259. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  260. </UL>

  261. <P><STRONG><a name="[40]"></a>TIM6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  262. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  263. </UL>

  264. <P><STRONG><a name="[41]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  265. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  266. </UL>

  267. <P><STRONG><a name="[35]"></a>TIM8_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  268. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  269. </UL>

  270. <P><STRONG><a name="[38]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  271. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  272. </UL>

  273. <P><STRONG><a name="[37]"></a>TIM8_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  274. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  275. </UL>

  276. <P><STRONG><a name="[36]"></a>TIM8_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  277. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  278. </UL>

  279. <P><STRONG><a name="[3e]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  280. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  281. </UL>

  282. <P><STRONG><a name="[3f]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  283. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  284. </UL>

  285. <P><STRONG><a name="[34]"></a>USBWakeUp_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  286. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  287. </UL>

  288. <P><STRONG><a name="[1d]"></a>USB_HP_CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  289. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  290. </UL>

  291. <P><STRONG><a name="[1e]"></a>USB_LP_CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  292. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  293. </UL>

  294. <P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text))

  295. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  296. </UL>

  297. <P><STRONG><a name="[4d]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text))

  298. <BR><BR>[Called By]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset$wrapper

  299. <LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr

  300. </UL>

  301. 

  302. <P><STRONG><a name="[c5]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

  303. 

  304. <P><STRONG><a name="[c6]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

  305. 

  306. <P><STRONG><a name="[4c]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text))

  307. <BR><BR>[Calls]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset

  308. </UL>

  309. <BR>[Called By]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_1356

  310. </UL>

  311. 

  312. <P><STRONG><a name="[94]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))

  313. <BR><BR>[Called By]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SavePara_to_flash

  314. <LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Readpara_from_flash

  315. </UL>

  316. 

  317. <P><STRONG><a name="[c7]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

  318. 

  319. <P><STRONG><a name="[4e]"></a>_memset$wrapper</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)

  320. <BR><BR>[Calls]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset

  321. </UL>

  322. 

  323. <P><STRONG><a name="[4b]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))

  324. <BR><BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload

  325. </UL>

  326. <BR>[Called By]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload

  327. </UL>

  328. 

  329. <P><STRONG><a name="[c8]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

  330. 

  331. <P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(i.BusFault_Handler))

  332. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  333. </UL>

  334. <P><STRONG><a name="[53]"></a>CheckSum</STRONG> (Thumb, 36 bytes, Stack size 8 bytes, dataproc.o(i.CheckSum))

  335. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = CheckSum

  336. </UL>

  337. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  338. </UL>

  339. 

  340. <P><STRONG><a name="[50]"></a>DataProc_1356</STRONG> (Thumb, 248 bytes, Stack size 32 bytes, dataproc.o(i.DataProc_1356))

  341. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = DataProc_1356 &rArr; IWDG_Feed

  342. </UL>

  343. <BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Feed

  344. <LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr

  345. </UL>

  346. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  347. </UL>

  348. 

  349. <P><STRONG><a name="[52]"></a>DataProc_A0_WriteNum_SPI2</STRONG> (Thumb, 516 bytes, Stack size 40 bytes, dataproc.o(i.DataProc_A0_WriteNum_SPI2))

  350. <BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = DataProc_A0_WriteNum_SPI2 &rArr; NRF24L01_RX_Mode_NOACK &rArr; NRF24L01_RX_YunNan_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  351. </UL>

  352. <BR>[Calls]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CheckSum

  353. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RxPacket

  354. <LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  355. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  356. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  357. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode

  358. <LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Feed

  359. <LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUSART2Str

  360. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUSART2Byte

  361. <LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendConsoleData

  362. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DegugPrintf

  363. </UL>

  364. <BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  365. </UL>

  366. 

  367. <P><STRONG><a name="[5d]"></a>DataProc_A4_nrf</STRONG> (Thumb, 350 bytes, Stack size 40 bytes, dataproc.o(i.DataProc_A4_nrf))

  368. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = DataProc_A4_nrf &rArr; NRF24L01_RxPacket &rArr; NRF24L01_Read_Buf &rArr; SPI_ReadWriteByte

  369. </UL>

  370. <BR>[Calls]<UL><LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RxPacket

  371. <LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Feed

  372. </UL>

  373. <BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  374. </UL>

  375. 

  376. <P><STRONG><a name="[5e]"></a>DataProc_USART1</STRONG> (Thumb, 1512 bytes, Stack size 8 bytes, dataproc.o(i.DataProc_USART1))

  377. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = DataProc_USART1 &rArr; DataProc_A0_WriteNum_SPI2 &rArr; NRF24L01_RX_Mode_NOACK &rArr; NRF24L01_RX_YunNan_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  378. </UL>

  379. <BR>[Calls]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SavePara_to_flash

  380. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A4_nrf

  381. <LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  382. <LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  383. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode

  384. <LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Feed

  385. <LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms

  386. <LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUSART2Str

  387. <LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendConsoleData

  388. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DegugPrintf

  389. </UL>

  390. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  391. </UL>

  392. 

  393. <P><STRONG><a name="[be]"></a>Data_Init</STRONG> (Thumb, 298 bytes, Stack size 0 bytes, dataproc.o(i.Data_Init))

  394. <BR><BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  395. </UL>

  396. 

  397. <P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.DebugMon_Handler))

  398. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  399. </UL>

  400. <P><STRONG><a name="[5a]"></a>DegugPrintf</STRONG> (Thumb, 52 bytes, Stack size 24 bytes, printf.o(i.DegugPrintf))

  401. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = DegugPrintf &rArr; SendUSART2Byte &rArr; SendUartByte

  402. </UL>

  403. <BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUSART2Byte

  404. <LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HexToAscii

  405. </UL>

  406. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  407. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  408. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  409. </UL>

  410. 

  411. <P><STRONG><a name="[62]"></a>FLASH_ErasePage</STRONG> (Thumb, 72 bytes, Stack size 12 bytes, stm32f10x_flash.o(i.FLASH_ErasePage))

  412. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = FLASH_ErasePage &rArr; FLASH_WaitForLastOperation

  413. </UL>

  414. <BR>[Calls]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation

  415. </UL>

  416. <BR>[Called By]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Startwritedata

  417. </UL>

  418. 

  419. <P><STRONG><a name="[65]"></a>FLASH_GetBank1Status</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, stm32f10x_flash.o(i.FLASH_GetBank1Status))

  420. <BR><BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation

  421. </UL>

  422. 

  423. <P><STRONG><a name="[b9]"></a>FLASH_Lock</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f10x_flash.o(i.FLASH_Lock))

  424. <BR><BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Write_Complete

  425. </UL>

  426. 

  427. <P><STRONG><a name="[64]"></a>FLASH_ProgramHalfWord</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, stm32f10x_flash.o(i.FLASH_ProgramHalfWord))

  428. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = FLASH_ProgramHalfWord &rArr; FLASH_WaitForLastOperation

  429. </UL>

  430. <BR>[Calls]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation

  431. </UL>

  432. <BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SavePara

  433. </UL>

  434. 

  435. <P><STRONG><a name="[a7]"></a>FLASH_Unlock</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f10x_flash.o(i.FLASH_Unlock))

  436. <BR><BR>[Called By]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Startwritedata

  437. </UL>

  438. 

  439. <P><STRONG><a name="[63]"></a>FLASH_WaitForLastOperation</STRONG> (Thumb, 38 bytes, Stack size 4 bytes, stm32f10x_flash.o(i.FLASH_WaitForLastOperation))

  440. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = FLASH_WaitForLastOperation

  441. </UL>

  442. <BR>[Calls]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_GetBank1Status

  443. </UL>

  444. <BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_ProgramHalfWord

  445. <LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_ErasePage

  446. </UL>

  447. 

  448. <P><STRONG><a name="[71]"></a>GPIO_Init</STRONG> (Thumb, 278 bytes, Stack size 24 bytes, stm32f10x_gpio.o(i.GPIO_Init))

  449. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = GPIO_Init

  450. </UL>

  451. <BR>[Called By]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI2_Init

  452. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI1_Init

  453. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_init

  454. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_Init

  455. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Init

  456. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Configuration

  457. </UL>

  458. 

  459. <P><STRONG><a name="[aa]"></a>GPIO_ResetBits</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_gpio.o(i.GPIO_ResetBits))

  460. <BR><BR>[Called By]<UL><LI><a href="#[27]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_IRQHandler

  461. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_init

  462. </UL>

  463. 

  464. <P><STRONG><a name="[72]"></a>GPIO_SetBits</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_gpio.o(i.GPIO_SetBits))

  465. <BR><BR>[Called By]<UL><LI><a href="#[27]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_IRQHandler

  466. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI2_Init

  467. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI1_Init

  468. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_init

  469. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Init

  470. </UL>

  471. 

  472. <P><STRONG><a name="[96]"></a>GetPara</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, flash.o(i.GetPara))

  473. <BR><BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Readstr_of_flash

  474. </UL>

  475. 

  476. <P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(i.HardFault_Handler))

  477. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  478. </UL>

  479. <P><STRONG><a name="[61]"></a>HexToAscii</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, printf.o(i.HexToAscii))

  480. <BR><BR>[Called By]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DegugPrintf

  481. </UL>

  482. 

  483. <P><STRONG><a name="[6b]"></a>IWDG_Enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f10x_iwdg.o(i.IWDG_Enable))

  484. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Init

  485. </UL>

  486. 

  487. <P><STRONG><a name="[51]"></a>IWDG_Feed</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, main.o(i.IWDG_Feed))

  488. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = IWDG_Feed

  489. </UL>

  490. <BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_ReloadCounter

  491. </UL>

  492. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A4_nrf

  493. <LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  494. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  495. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_1356

  496. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  497. </UL>

  498. 

  499. <P><STRONG><a name="[67]"></a>IWDG_Init</STRONG> (Thumb, 36 bytes, Stack size 16 bytes, main.o(i.IWDG_Init))

  500. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = IWDG_Init

  501. </UL>

  502. <BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_WriteAccessCmd

  503. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_SetReload

  504. <LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_SetPrescaler

  505. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_ReloadCounter

  506. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Enable

  507. </UL>

  508. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  509. </UL>

  510. 

  511. <P><STRONG><a name="[66]"></a>IWDG_ReloadCounter</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f10x_iwdg.o(i.IWDG_ReloadCounter))

  512. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Init

  513. <LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Feed

  514. </UL>

  515. 

  516. <P><STRONG><a name="[69]"></a>IWDG_SetPrescaler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_iwdg.o(i.IWDG_SetPrescaler))

  517. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Init

  518. </UL>

  519. 

  520. <P><STRONG><a name="[6a]"></a>IWDG_SetReload</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_iwdg.o(i.IWDG_SetReload))

  521. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Init

  522. </UL>

  523. 

  524. <P><STRONG><a name="[68]"></a>IWDG_WriteAccessCmd</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_iwdg.o(i.IWDG_WriteAccessCmd))

  525. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Init

  526. </UL>

  527. 

  528. <P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(i.MemManage_Handler))

  529. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  530. </UL>

  531. <P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.NMI_Handler))

  532. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  533. </UL>

  534. <P><STRONG><a name="[6c]"></a>NRF24L01_Check</STRONG> (Thumb, 80 bytes, Stack size 24 bytes, nrf24l01.o(i.NRF24L01_Check))

  535. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = NRF24L01_Check &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  536. </UL>

  537. <BR>[Calls]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_SetSpeed

  538. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  539. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Read_Buf

  540. </UL>

  541. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  542. </UL>

  543. 

  544. <P><STRONG><a name="[6f]"></a>NRF24L01_Init</STRONG> (Thumb, 232 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_Init))

  545. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_Init &rArr; SPI2_Init &rArr; GPIO_Init

  546. </UL>

  547. <BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI2_Init

  548. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI1_Init

  549. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits

  550. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_SetSpeed

  551. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd

  552. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init

  553. </UL>

  554. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  555. </UL>

  556. 

  557. <P><STRONG><a name="[75]"></a>NRF24L01_RX_AHDX_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_AHDX_CONFIG))

  558. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_AHDX_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  559. </UL>

  560. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  561. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  562. </UL>

  563. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  564. </UL>

  565. 

  566. <P><STRONG><a name="[76]"></a>NRF24L01_RX_AnHui_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_AnHui_CONFIG))

  567. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_AnHui_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  568. </UL>

  569. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  570. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  571. </UL>

  572. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  573. </UL>

  574. 

  575. <P><STRONG><a name="[77]"></a>NRF24L01_RX_CQYD_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_CQYD_CONFIG))

  576. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_CQYD_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  577. </UL>

  578. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  579. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  580. </UL>

  581. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  582. </UL>

  583. 

  584. <P><STRONG><a name="[78]"></a>NRF24L01_RX_DH_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_DH_CONFIG))

  585. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_DH_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  586. </UL>

  587. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  588. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  589. </UL>

  590. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  591. </UL>

  592. 

  593. <P><STRONG><a name="[79]"></a>NRF24L01_RX_FJZZ_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_FJZZ_CONFIG))

  594. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_FJZZ_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  595. </UL>

  596. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  597. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  598. </UL>

  599. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  600. </UL>

  601. 

  602. <P><STRONG><a name="[7a]"></a>NRF24L01_RX_GSYD_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_GSYD_CONFIG))

  603. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_GSYD_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  604. </UL>

  605. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  606. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  607. </UL>

  608. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  609. </UL>

  610. 

  611. <P><STRONG><a name="[7b]"></a>NRF24L01_RX_GXYD_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_GXYD_CONFIG))

  612. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_GXYD_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  613. </UL>

  614. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  615. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  616. </UL>

  617. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  618. </UL>

  619. 

  620. <P><STRONG><a name="[7c]"></a>NRF24L01_RX_GuiZhou_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_GuiZhou_CONFIG))

  621. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_GuiZhou_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  622. </UL>

  623. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  624. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  625. </UL>

  626. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  627. </UL>

  628. 

  629. <P><STRONG><a name="[7d]"></a>NRF24L01_RX_JiangXi_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_JiangXi_CONFIG))

  630. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_JiangXi_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  631. </UL>

  632. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  633. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  634. </UL>

  635. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  636. </UL>

  637. 

  638. <P><STRONG><a name="[7e]"></a>NRF24L01_RX_LIAO_NING_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_LIAO_NING_CONFIG))

  639. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_LIAO_NING_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  640. </UL>

  641. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  642. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  643. </UL>

  644. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  645. </UL>

  646. 

  647. <P><STRONG><a name="[56]"></a>NRF24L01_RX_Mode</STRONG> (Thumb, 166 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_Mode))

  648. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_Mode &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  649. </UL>

  650. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  651. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  652. </UL>

  653. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  654. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  655. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  656. </UL>

  657. 

  658. <P><STRONG><a name="[5b]"></a>NRF24L01_RX_Mode_NOACK</STRONG> (Thumb, 262 bytes, Stack size 16 bytes, nrf24l01.o(i.NRF24L01_RX_Mode_NOACK))

  659. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = NRF24L01_RX_Mode_NOACK &rArr; NRF24L01_RX_YunNan_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  660. </UL>

  661. <BR>[Calls]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_YunNan_CONFIG

  662. <LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_XDF_CONFIG

  663. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_VCM_CONFIG

  664. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_TelPo_CONFIG

  665. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_TP_CONFIG

  666. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_SiChuan_CONFIG

  667. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_ShanXiXinNuo_CONFIG

  668. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_SZML_CONFIG

  669. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_SXYD_CONFIG

  670. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_NeiMengGu_CONFIG

  671. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_NMGYD_CONFIG

  672. <LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_NEW_LIAO_NING_CONFIG

  673. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_LIAO_NING_CONFIG

  674. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_JiangXi_CONFIG

  675. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_GuiZhou_CONFIG

  676. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_GXYD_CONFIG

  677. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_GSYD_CONFIG

  678. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_FJZZ_CONFIG

  679. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_DH_CONFIG

  680. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_CQYD_CONFIG

  681. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_AnHui_CONFIG

  682. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_AHDX_CONFIG

  683. </UL>

  684. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  685. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  686. </UL>

  687. 

  688. <P><STRONG><a name="[85]"></a>NRF24L01_RX_NEW_LIAO_NING_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_NEW_LIAO_NING_CONFIG))

  689. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_NEW_LIAO_NING_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  690. </UL>

  691. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  692. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  693. </UL>

  694. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  695. </UL>

  696. 

  697. <P><STRONG><a name="[87]"></a>NRF24L01_RX_NMGYD_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_NMGYD_CONFIG))

  698. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_NMGYD_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  699. </UL>

  700. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  701. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  702. </UL>

  703. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  704. </UL>

  705. 

  706. <P><STRONG><a name="[82]"></a>NRF24L01_RX_NeiMengGu_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_NeiMengGu_CONFIG))

  707. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_NeiMengGu_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  708. </UL>

  709. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  710. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  711. </UL>

  712. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  713. </UL>

  714. 

  715. <P><STRONG><a name="[89]"></a>NRF24L01_RX_SXYD_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_SXYD_CONFIG))

  716. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_SXYD_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  717. </UL>

  718. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  719. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  720. </UL>

  721. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  722. </UL>

  723. 

  724. <P><STRONG><a name="[88]"></a>NRF24L01_RX_SZML_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_SZML_CONFIG))

  725. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_SZML_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  726. </UL>

  727. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  728. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  729. </UL>

  730. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  731. </UL>

  732. 

  733. <P><STRONG><a name="[83]"></a>NRF24L01_RX_ShanXiXinNuo_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_ShanXiXinNuo_CONFIG))

  734. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_ShanXiXinNuo_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  735. </UL>

  736. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  737. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  738. </UL>

  739. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  740. </UL>

  741. 

  742. <P><STRONG><a name="[81]"></a>NRF24L01_RX_SiChuan_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_SiChuan_CONFIG))

  743. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_SiChuan_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  744. </UL>

  745. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  746. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  747. </UL>

  748. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  749. </UL>

  750. 

  751. <P><STRONG><a name="[86]"></a>NRF24L01_RX_TP_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_TP_CONFIG))

  752. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_TP_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  753. </UL>

  754. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  755. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  756. </UL>

  757. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  758. </UL>

  759. 

  760. <P><STRONG><a name="[7f]"></a>NRF24L01_RX_TelPo_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_TelPo_CONFIG))

  761. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_TelPo_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  762. </UL>

  763. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  764. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  765. </UL>

  766. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  767. </UL>

  768. 

  769. <P><STRONG><a name="[84]"></a>NRF24L01_RX_VCM_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_VCM_CONFIG))

  770. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_VCM_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  771. </UL>

  772. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  773. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  774. </UL>

  775. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  776. </UL>

  777. 

  778. <P><STRONG><a name="[8a]"></a>NRF24L01_RX_XDF_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_XDF_CONFIG))

  779. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_XDF_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  780. </UL>

  781. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  782. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  783. </UL>

  784. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  785. </UL>

  786. 

  787. <P><STRONG><a name="[80]"></a>NRF24L01_RX_YunNan_CONFIG</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, nrf24l01.o(i.NRF24L01_RX_YunNan_CONFIG))

  788. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = NRF24L01_RX_YunNan_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  789. </UL>

  790. <BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  791. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  792. </UL>

  793. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode_NOACK

  794. </UL>

  795. 

  796. <P><STRONG><a name="[6e]"></a>NRF24L01_Read_Buf</STRONG> (Thumb, 114 bytes, Stack size 32 bytes, nrf24l01.o(i.NRF24L01_Read_Buf))

  797. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = NRF24L01_Read_Buf &rArr; SPI_ReadWriteByte

  798. </UL>

  799. <BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_ReadWriteByte

  800. </UL>

  801. <BR>[Called By]<UL><LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RxPacket

  802. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Check

  803. </UL>

  804. 

  805. <P><STRONG><a name="[8c]"></a>NRF24L01_Read_Reg</STRONG> (Thumb, 78 bytes, Stack size 16 bytes, nrf24l01.o(i.NRF24L01_Read_Reg))

  806. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = NRF24L01_Read_Reg &rArr; SPI_ReadWriteByte

  807. </UL>

  808. <BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_ReadWriteByte

  809. </UL>

  810. <BR>[Called By]<UL><LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RxPacket

  811. </UL>

  812. 

  813. <P><STRONG><a name="[57]"></a>NRF24L01_RxPacket</STRONG> (Thumb, 66 bytes, Stack size 16 bytes, nrf24l01.o(i.NRF24L01_RxPacket))

  814. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = NRF24L01_RxPacket &rArr; NRF24L01_Read_Buf &rArr; SPI_ReadWriteByte

  815. </UL>

  816. <BR>[Calls]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_SetSpeed

  817. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  818. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Read_Reg

  819. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Read_Buf

  820. </UL>

  821. <BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A4_nrf

  822. <LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  823. </UL>

  824. 

  825. <P><STRONG><a name="[55]"></a>NRF24L01_Write_Buf</STRONG> (Thumb, 114 bytes, Stack size 32 bytes, nrf24l01.o(i.NRF24L01_Write_Buf))

  826. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  827. </UL>

  828. <BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_ReadWriteByte

  829. </UL>

  830. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  831. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_YunNan_CONFIG

  832. <LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_XDF_CONFIG

  833. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_VCM_CONFIG

  834. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_TelPo_CONFIG

  835. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_TP_CONFIG

  836. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_SiChuan_CONFIG

  837. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_ShanXiXinNuo_CONFIG

  838. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_SZML_CONFIG

  839. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_SXYD_CONFIG

  840. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_NeiMengGu_CONFIG

  841. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_NMGYD_CONFIG

  842. <LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_NEW_LIAO_NING_CONFIG

  843. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_LIAO_NING_CONFIG

  844. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_JiangXi_CONFIG

  845. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_GuiZhou_CONFIG

  846. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_GXYD_CONFIG

  847. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_GSYD_CONFIG

  848. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_FJZZ_CONFIG

  849. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_DH_CONFIG

  850. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_CQYD_CONFIG

  851. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_AnHui_CONFIG

  852. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_AHDX_CONFIG

  853. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode

  854. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Check

  855. </UL>

  856. 

  857. <P><STRONG><a name="[54]"></a>NRF24L01_Write_Reg</STRONG> (Thumb, 84 bytes, Stack size 24 bytes, nrf24l01.o(i.NRF24L01_Write_Reg))

  858. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = NRF24L01_Write_Reg &rArr; SPI_ReadWriteByte

  859. </UL>

  860. <BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_ReadWriteByte

  861. </UL>

  862. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  863. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RxPacket

  864. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_YunNan_CONFIG

  865. <LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_XDF_CONFIG

  866. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_VCM_CONFIG

  867. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_TelPo_CONFIG

  868. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_TP_CONFIG

  869. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_SiChuan_CONFIG

  870. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_ShanXiXinNuo_CONFIG

  871. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_SZML_CONFIG

  872. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_SXYD_CONFIG

  873. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_NeiMengGu_CONFIG

  874. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_NMGYD_CONFIG

  875. <LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_NEW_LIAO_NING_CONFIG

  876. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_LIAO_NING_CONFIG

  877. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_JiangXi_CONFIG

  878. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_GuiZhou_CONFIG

  879. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_GXYD_CONFIG

  880. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_GSYD_CONFIG

  881. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_FJZZ_CONFIG

  882. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_DH_CONFIG

  883. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_CQYD_CONFIG

  884. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_AnHui_CONFIG

  885. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_AHDX_CONFIG

  886. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode

  887. </UL>

  888. 

  889. <P><STRONG><a name="[8d]"></a>NVIC_Configuration</STRONG> (Thumb, 124 bytes, Stack size 8 bytes, main.o(i.NVIC_Configuration))

  890. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = NVIC_Configuration &rArr; NVIC_Init

  891. </UL>

  892. <BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_PriorityGroupConfig

  893. <LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init

  894. </UL>

  895. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  896. </UL>

  897. 

  898. <P><STRONG><a name="[8f]"></a>NVIC_Init</STRONG> (Thumb, 100 bytes, Stack size 16 bytes, misc.o(i.NVIC_Init))

  899. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = NVIC_Init

  900. </UL>

  901. <BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Configuration

  902. </UL>

  903. 

  904. <P><STRONG><a name="[8e]"></a>NVIC_PriorityGroupConfig</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, misc.o(i.NVIC_PriorityGroupConfig))

  905. <BR><BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Configuration

  906. </UL>

  907. 

  908. <P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.PendSV_Handler))

  909. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  910. </UL>

  911. <P><STRONG><a name="[91]"></a>RCC_APB1PeriphClockCmd</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f10x_rcc.o(i.RCC_APB1PeriphClockCmd))

  912. <BR><BR>[Called By]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI2_Init

  913. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_Init

  914. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Int_Init

  915. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_Configuration

  916. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Configuration

  917. </UL>

  918. 

  919. <P><STRONG><a name="[70]"></a>RCC_APB2PeriphClockCmd</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f10x_rcc.o(i.RCC_APB2PeriphClockCmd))

  920. <BR><BR>[Called By]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI2_Init

  921. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI1_Init

  922. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_init

  923. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_Init

  924. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Init

  925. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_Configuration

  926. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Configuration

  927. </UL>

  928. 

  929. <P><STRONG><a name="[90]"></a>RCC_Configuration</STRONG> (Thumb, 98 bytes, Stack size 16 bytes, main.o(i.RCC_Configuration))

  930. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = RCC_Configuration

  931. </UL>

  932. <BR>[Calls]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_CLKSourceConfig

  933. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd

  934. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd

  935. </UL>

  936. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  937. </UL>

  938. 

  939. <P><STRONG><a name="[b8]"></a>RCC_GetClocksFreq</STRONG> (Thumb, 190 bytes, Stack size 16 bytes, stm32f10x_rcc.o(i.RCC_GetClocksFreq))

  940. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = RCC_GetClocksFreq

  941. </UL>

  942. <BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init

  943. </UL>

  944. 

  945. <P><STRONG><a name="[93]"></a>Readpara_from_flash</STRONG> (Thumb, 52 bytes, Stack size 32 bytes, flash.o(i.Readpara_from_flash))

  946. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = Readpara_from_flash &rArr; Readstr_of_flash

  947. </UL>

  948. <BR>[Calls]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Readstr_of_flash

  949. <LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4

  950. </UL>

  951. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  952. </UL>

  953. 

  954. <P><STRONG><a name="[95]"></a>Readstr_of_flash</STRONG> (Thumb, 36 bytes, Stack size 16 bytes, flash.o(i.Readstr_of_flash))

  955. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = Readstr_of_flash

  956. </UL>

  957. <BR>[Calls]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetPara

  958. </UL>

  959. <BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Readpara_from_flash

  960. </UL>

  961. 

  962. <P><STRONG><a name="[74]"></a>SPI1_Init</STRONG> (Thumb, 122 bytes, Stack size 32 bytes, spi.o(i.SPI1_Init))

  963. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = SPI1_Init &rArr; GPIO_Init

  964. </UL>

  965. <BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Init

  966. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Cmd

  967. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits

  968. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd

  969. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init

  970. </UL>

  971. <BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Init

  972. </UL>

  973. 

  974. <P><STRONG><a name="[73]"></a>SPI2_Init</STRONG> (Thumb, 132 bytes, Stack size 32 bytes, spi.o(i.SPI2_Init))

  975. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = SPI2_Init &rArr; GPIO_Init

  976. </UL>

  977. <BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Init

  978. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Cmd

  979. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits

  980. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd

  981. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd

  982. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init

  983. </UL>

  984. <BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Init

  985. </UL>

  986. 

  987. <P><STRONG><a name="[98]"></a>SPI_Cmd</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_spi.o(i.SPI_Cmd))

  988. <BR><BR>[Called By]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI2_Init

  989. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI1_Init

  990. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_SetSpeed

  991. </UL>

  992. 

  993. <P><STRONG><a name="[99]"></a>SPI_I2S_GetFlagStatus</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_spi.o(i.SPI_I2S_GetFlagStatus))

  994. <BR><BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_ReadWriteByte

  995. </UL>

  996. 

  997. <P><STRONG><a name="[9b]"></a>SPI_I2S_ReceiveData</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_spi.o(i.SPI_I2S_ReceiveData))

  998. <BR><BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_ReadWriteByte

  999. </UL>

  1000. 

  1001. <P><STRONG><a name="[9a]"></a>SPI_I2S_SendData</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_spi.o(i.SPI_I2S_SendData))

  1002. <BR><BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_ReadWriteByte

  1003. </UL>

  1004. 

  1005. <P><STRONG><a name="[97]"></a>SPI_Init</STRONG> (Thumb, 60 bytes, Stack size 8 bytes, stm32f10x_spi.o(i.SPI_Init))

  1006. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SPI_Init

  1007. </UL>

  1008. <BR>[Called By]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI2_Init

  1009. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI1_Init

  1010. </UL>

  1011. 

  1012. <P><STRONG><a name="[8b]"></a>SPI_ReadWriteByte</STRONG> (Thumb, 158 bytes, Stack size 24 bytes, spi.o(i.SPI_ReadWriteByte))

  1013. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI_ReadWriteByte

  1014. </UL>

  1015. <BR>[Calls]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_I2S_SendData

  1016. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_I2S_ReceiveData

  1017. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_I2S_GetFlagStatus

  1018. </UL>

  1019. <BR>[Called By]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Reg

  1020. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Write_Buf

  1021. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Read_Reg

  1022. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Read_Buf

  1023. </UL>

  1024. 

  1025. <P><STRONG><a name="[6d]"></a>SPI_SetSpeed</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, spi.o(i.SPI_SetSpeed))

  1026. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SPI_SetSpeed

  1027. </UL>

  1028. <BR>[Calls]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Cmd

  1029. </UL>

  1030. <BR>[Called By]<UL><LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RxPacket

  1031. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Init

  1032. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Check

  1033. </UL>

  1034. 

  1035. <P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.SVC_Handler))

  1036. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  1037. </UL>

  1038. <P><STRONG><a name="[9c]"></a>SavePara</STRONG> (Thumb, 16 bytes, Stack size 16 bytes, flash.o(i.SavePara))

  1039. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = SavePara &rArr; FLASH_ProgramHalfWord &rArr; FLASH_WaitForLastOperation

  1040. </UL>

  1041. <BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_ProgramHalfWord

  1042. </UL>

  1043. <BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Savestr_to_flash

  1044. </UL>

  1045. 

  1046. <P><STRONG><a name="[60]"></a>SavePara_to_flash</STRONG> (Thumb, 62 bytes, Stack size 32 bytes, flash.o(i.SavePara_to_flash))

  1047. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = SavePara_to_flash &rArr; Savestr_to_flash &rArr; SavePara &rArr; FLASH_ProgramHalfWord &rArr; FLASH_WaitForLastOperation

  1048. </UL>

  1049. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Write_Complete

  1050. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Startwritedata

  1051. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Savestr_to_flash

  1052. <LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4

  1053. </UL>

  1054. <BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  1055. </UL>

  1056. 

  1057. <P><STRONG><a name="[9e]"></a>Savestr_to_flash</STRONG> (Thumb, 40 bytes, Stack size 24 bytes, flash.o(i.Savestr_to_flash))

  1058. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = Savestr_to_flash &rArr; SavePara &rArr; FLASH_ProgramHalfWord &rArr; FLASH_WaitForLastOperation

  1059. </UL>

  1060. <BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SavePara

  1061. </UL>

  1062. <BR>[Called By]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SavePara_to_flash

  1063. </UL>

  1064. 

  1065. <P><STRONG><a name="[5c]"></a>SendConsoleData</STRONG> (Thumb, 18 bytes, Stack size 16 bytes, printf.o(i.SendConsoleData))

  1066. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = SendConsoleData &rArr; SendUartData &rArr; SendUartByte

  1067. </UL>

  1068. <BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUartData

  1069. </UL>

  1070. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  1071. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  1072. </UL>

  1073. 

  1074. <P><STRONG><a name="[58]"></a>SendUSART2Byte</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, printf.o(i.SendUSART2Byte))

  1075. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SendUSART2Byte &rArr; SendUartByte

  1076. </UL>

  1077. <BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUartByte

  1078. </UL>

  1079. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  1080. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DegugPrintf

  1081. </UL>

  1082. 

  1083. <P><STRONG><a name="[59]"></a>SendUSART2Str</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, printf.o(i.SendUSART2Str))

  1084. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = SendUSART2Str &rArr; SendUartStr &rArr; SendUartByte

  1085. </UL>

  1086. <BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUartStr

  1087. </UL>

  1088. <BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_A0_WriteNum_SPI2

  1089. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  1090. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  1091. </UL>

  1092. 

  1093. <P><STRONG><a name="[a1]"></a>SendUartByte</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, printf.o(i.SendUartByte))

  1094. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SendUartByte

  1095. </UL>

  1096. <BR>[Calls]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_SendData

  1097. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetFlagStatus

  1098. </UL>

  1099. <BR>[Called By]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUartStr

  1100. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUartData

  1101. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUSART2Byte

  1102. </UL>

  1103. 

  1104. <P><STRONG><a name="[a0]"></a>SendUartData</STRONG> (Thumb, 50 bytes, Stack size 24 bytes, printf.o(i.SendUartData))

  1105. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = SendUartData &rArr; SendUartByte

  1106. </UL>

  1107. <BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUartByte

  1108. </UL>

  1109. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendConsoleData

  1110. </UL>

  1111. 

  1112. <P><STRONG><a name="[a2]"></a>SendUartStr</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, printf.o(i.SendUartStr))

  1113. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = SendUartStr &rArr; SendUartByte

  1114. </UL>

  1115. <BR>[Calls]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUartByte

  1116. </UL>

  1117. <BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUSART2Str

  1118. </UL>

  1119. 

  1120. <P><STRONG><a name="[9d]"></a>Startwritedata</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, flash.o(i.Startwritedata))

  1121. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = Startwritedata &rArr; FLASH_ErasePage &rArr; FLASH_WaitForLastOperation

  1122. </UL>

  1123. <BR>[Calls]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Unlock

  1124. <LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_ErasePage

  1125. </UL>

  1126. <BR>[Called By]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SavePara_to_flash

  1127. </UL>

  1128. 

  1129. <P><STRONG><a name="[92]"></a>SysTick_CLKSourceConfig</STRONG> (Thumb, 40 bytes, Stack size 0 bytes, misc.o(i.SysTick_CLKSourceConfig))

  1130. <BR><BR>[Called By]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_Configuration

  1131. </UL>

  1132. 

  1133. <P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(i.SysTick_Handler))

  1134. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  1135. </UL>

  1136. <P><STRONG><a name="[47]"></a>SystemInit</STRONG> (Thumb, 82 bytes, Stack size 8 bytes, system_stm32f10x.o(i.SystemInit))

  1137. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = SystemInit &rArr; SetSysClock &rArr; SetSysClockTo24

  1138. </UL>

  1139. <BR>[Calls]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SetSysClock

  1140. </UL>

  1141. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(.text)

  1142. </UL>

  1143. <P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 134 bytes, Stack size 8 bytes, dataproc.o(i.TIM3_IRQHandler))

  1144. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM3_IRQHandler &rArr; TIM_GetITStatus

  1145. </UL>

  1146. <BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_GetITStatus

  1147. <LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ClearITPendingBit

  1148. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ResetBits

  1149. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits

  1150. </UL>

  1151. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  1152. </UL>

  1153. <P><STRONG><a name="[ab]"></a>TIM3_Int_Init</STRONG> (Thumb, 60 bytes, Stack size 24 bytes, tim.o(i.TIM3_Int_Init))

  1154. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = TIM3_Int_Init

  1155. </UL>

  1156. <BR>[Calls]<UL><LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TimeBaseInit

  1157. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ITConfig

  1158. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd

  1159. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd

  1160. </UL>

  1161. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  1162. </UL>

  1163. 

  1164. <P><STRONG><a name="[a9]"></a>TIM_ClearITPendingBit</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_tim.o(i.TIM_ClearITPendingBit))

  1165. <BR><BR>[Called By]<UL><LI><a href="#[27]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_IRQHandler

  1166. </UL>

  1167. 

  1168. <P><STRONG><a name="[ae]"></a>TIM_Cmd</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_tim.o(i.TIM_Cmd))

  1169. <BR><BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Int_Init

  1170. </UL>

  1171. 

  1172. <P><STRONG><a name="[a8]"></a>TIM_GetITStatus</STRONG> (Thumb, 34 bytes, Stack size 12 bytes, stm32f10x_tim.o(i.TIM_GetITStatus))

  1173. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_GetITStatus

  1174. </UL>

  1175. <BR>[Called By]<UL><LI><a href="#[27]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_IRQHandler

  1176. </UL>

  1177. 

  1178. <P><STRONG><a name="[ad]"></a>TIM_ITConfig</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(i.TIM_ITConfig))

  1179. <BR><BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Int_Init

  1180. </UL>

  1181. 

  1182. <P><STRONG><a name="[ac]"></a>TIM_TimeBaseInit</STRONG> (Thumb, 122 bytes, Stack size 0 bytes, stm32f10x_tim.o(i.TIM_TimeBaseInit))

  1183. <BR><BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Int_Init

  1184. </UL>

  1185. 

  1186. <P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, printf.o(i.USART1_IRQHandler))

  1187. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = USART1_IRQHandler &rArr; USART_GetITStatus

  1188. </UL>

  1189. <BR>[Calls]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ReceiveData

  1190. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus

  1191. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetFlagStatus

  1192. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit

  1193. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearFlag

  1194. </UL>

  1195. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  1196. </UL>

  1197. <P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, usart2.o(i.USART2_IRQHandler))

  1198. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = USART2_IRQHandler &rArr; USART_GetITStatus

  1199. </UL>

  1200. <BR>[Calls]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ReceiveData

  1201. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus

  1202. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetFlagStatus

  1203. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit

  1204. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearFlag

  1205. </UL>

  1206. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  1207. </UL>

  1208. <P><STRONG><a name="[b3]"></a>USART2_Init</STRONG> (Thumb, 126 bytes, Stack size 32 bytes, usart2.o(i.USART2_Init))

  1209. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = USART2_Init &rArr; USART_Init &rArr; RCC_GetClocksFreq

  1210. </UL>

  1211. <BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init

  1212. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ITConfig

  1213. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Cmd

  1214. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd

  1215. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd

  1216. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init

  1217. </UL>

  1218. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  1219. </UL>

  1220. 

  1221. <P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 88 bytes, Stack size 8 bytes, printf.o(i.USART3_IRQHandler))

  1222. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = USART3_IRQHandler &rArr; USART_GetITStatus

  1223. </UL>

  1224. <BR>[Calls]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ReceiveData

  1225. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus

  1226. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetFlagStatus

  1227. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit

  1228. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearFlag

  1229. </UL>

  1230. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  1231. </UL>

  1232. <P><STRONG><a name="[b2]"></a>USART_ClearFlag</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_usart.o(i.USART_ClearFlag))

  1233. <BR><BR>[Called By]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler

  1234. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Configuration

  1235. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler

  1236. <LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler

  1237. </UL>

  1238. 

  1239. <P><STRONG><a name="[b0]"></a>USART_ClearITPendingBit</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, stm32f10x_usart.o(i.USART_ClearITPendingBit))

  1240. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = USART_ClearITPendingBit

  1241. </UL>

  1242. <BR>[Called By]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler

  1243. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler

  1244. <LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler

  1245. </UL>

  1246. 

  1247. <P><STRONG><a name="[b6]"></a>USART_Cmd</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_usart.o(i.USART_Cmd))

  1248. <BR><BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_Init

  1249. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Configuration

  1250. </UL>

  1251. 

  1252. <P><STRONG><a name="[b7]"></a>USART_Configuration</STRONG> (Thumb, 266 bytes, Stack size 24 bytes, printf.o(i.USART_Configuration))

  1253. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = USART_Configuration &rArr; USART_Init &rArr; RCC_GetClocksFreq

  1254. </UL>

  1255. <BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init

  1256. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ITConfig

  1257. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Cmd

  1258. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearFlag

  1259. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd

  1260. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd

  1261. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init

  1262. </UL>

  1263. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  1264. </UL>

  1265. 

  1266. <P><STRONG><a name="[a3]"></a>USART_GetFlagStatus</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f10x_usart.o(i.USART_GetFlagStatus))

  1267. <BR><BR>[Called By]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler

  1268. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc

  1269. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler

  1270. <LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler

  1271. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUartByte

  1272. </UL>

  1273. 

  1274. <P><STRONG><a name="[af]"></a>USART_GetITStatus</STRONG> (Thumb, 84 bytes, Stack size 16 bytes, stm32f10x_usart.o(i.USART_GetITStatus))

  1275. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = USART_GetITStatus

  1276. </UL>

  1277. <BR>[Called By]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler

  1278. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler

  1279. <LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler

  1280. </UL>

  1281. 

  1282. <P><STRONG><a name="[b5]"></a>USART_ITConfig</STRONG> (Thumb, 74 bytes, Stack size 20 bytes, stm32f10x_usart.o(i.USART_ITConfig))

  1283. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = USART_ITConfig

  1284. </UL>

  1285. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_Init

  1286. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Configuration

  1287. </UL>

  1288. 

  1289. <P><STRONG><a name="[b4]"></a>USART_Init</STRONG> (Thumb, 210 bytes, Stack size 56 bytes, stm32f10x_usart.o(i.USART_Init))

  1290. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = USART_Init &rArr; RCC_GetClocksFreq

  1291. </UL>

  1292. <BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetClocksFreq

  1293. </UL>

  1294. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_Init

  1295. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Configuration

  1296. </UL>

  1297. 

  1298. <P><STRONG><a name="[b1]"></a>USART_ReceiveData</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f10x_usart.o(i.USART_ReceiveData))

  1299. <BR><BR>[Called By]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler

  1300. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler

  1301. <LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler

  1302. </UL>

  1303. 

  1304. <P><STRONG><a name="[a4]"></a>USART_SendData</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f10x_usart.o(i.USART_SendData))

  1305. <BR><BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUartByte

  1306. </UL>

  1307. 

  1308. <P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(i.UsageFault_Handler))

  1309. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET)

  1310. </UL>

  1311. <P><STRONG><a name="[9f]"></a>Write_Complete</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, flash.o(i.Write_Complete))

  1312. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Write_Complete

  1313. </UL>

  1314. <BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Lock

  1315. </UL>

  1316. <BR>[Called By]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SavePara_to_flash

  1317. </UL>

  1318. 

  1319. <P><STRONG><a name="[ba]"></a>__0printf$bare</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, printfb.o(i.__0printf$bare), UNUSED)

  1320. <BR><BR>[Calls]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core

  1321. </UL>

  1322. 

  1323. <P><STRONG><a name="[c9]"></a>__1printf$bare</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, printfb.o(i.__0printf$bare), UNUSED)

  1324. 

  1325. <P><STRONG><a name="[bd]"></a>__2printf</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, printfb.o(i.__0printf$bare))

  1326. <BR><BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  1327. </UL>

  1328. 

  1329. <P><STRONG><a name="[ca]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

  1330. 

  1331. <P><STRONG><a name="[cb]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

  1332. 

  1333. <P><STRONG><a name="[cc]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

  1334. 

  1335. <P><STRONG><a name="[5f]"></a>delay_ms</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, delay.o(i.delay_ms))

  1336. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = delay_ms

  1337. </UL>

  1338. <BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  1339. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  1340. </UL>

  1341. 

  1342. <P><STRONG><a name="[49]"></a>fputc</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, printf.o(i.fputc))

  1343. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = fputc

  1344. </UL>

  1345. <BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetFlagStatus

  1346. </UL>

  1347. <BR>[Address Reference Count : 1]<UL><LI> printfb.o(i.__0printf$bare)

  1348. </UL>

  1349. <P><STRONG><a name="[bc]"></a>led_init</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, led.o(i.led_init))

  1350. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = led_init &rArr; GPIO_Init

  1351. </UL>

  1352. <BR>[Calls]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ResetBits

  1353. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits

  1354. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd

  1355. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init

  1356. </UL>

  1357. <BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main

  1358. </UL>

  1359. 

  1360. <P><STRONG><a name="[46]"></a>main</STRONG> (Thumb, 402 bytes, Stack size 0 bytes, main.o(i.main))

  1361. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = main &rArr; DataProc_USART1 &rArr; DataProc_A0_WriteNum_SPI2 &rArr; NRF24L01_RX_Mode_NOACK &rArr; NRF24L01_RX_YunNan_CONFIG &rArr; NRF24L01_Write_Buf &rArr; SPI_ReadWriteByte

  1362. </UL>

  1363. <BR>[Calls]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_init

  1364. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_Init

  1365. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Int_Init

  1366. <LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Readpara_from_flash

  1367. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_RX_Mode

  1368. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Init

  1369. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NRF24L01_Check

  1370. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Data_Init

  1371. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_USART1

  1372. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DataProc_1356

  1373. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_Configuration

  1374. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Configuration

  1375. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Init

  1376. <LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IWDG_Feed

  1377. <LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms

  1378. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Configuration

  1379. <LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SendUSART2Str

  1380. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DegugPrintf

  1381. <LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf

  1382. </UL>

  1383. <BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)

  1384. </UL><P>

  1385. <H3>

  1386. Local Symbols

  1387. </H3>

  1388. <P><STRONG><a name="[a5]"></a>SetSysClock</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, system_stm32f10x.o(i.SetSysClock))

  1389. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SetSysClock &rArr; SetSysClockTo24

  1390. </UL>

  1391. <BR>[Calls]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SetSysClockTo24

  1392. </UL>

  1393. <BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit

  1394. </UL>

  1395. 

  1396. <P><STRONG><a name="[a6]"></a>SetSysClockTo24</STRONG> (Thumb, 178 bytes, Stack size 12 bytes, system_stm32f10x.o(i.SetSysClockTo24))

  1397. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = SetSysClockTo24

  1398. </UL>

  1399. <BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SetSysClock

  1400. </UL>

  1401. 

  1402. <P><STRONG><a name="[bb]"></a>_printf_core</STRONG> (Thumb, 34 bytes, Stack size 24 bytes, printfb.o(i._printf_core), UNUSED)

  1403. <BR><BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0printf$bare

  1404. </UL>

  1405. <P>

  1406. <H3>

  1407. Undefined Global Symbols

  1408. </H3><HR></body></html>